1. Field of the Invention
The present invention relates to a power amplifier in which the collector voltages and idle currents of the amplifier transistors are varied.
2. Background Art
Japanese Laid-Open Patent Publication No. 2004-274433 discloses a power amplifier in which the collector voltage Vc and the idle current Icq of the amplifier transistor (or high frequency transistor) are varied in accordance with the output power level of the amplifier transistor. Specifically, in this power amplifier, the collector voltage Vc and the idle current Icq are increased when the output power is high and decreased when the output power is low, thereby improving the efficiency of the power amplifier even at low output power levels.
W-CDMA systems require that the phase shift in the power amplifiers in the system be constant regardless of their output power level. Further, the power amplifiers must also have optimum input reflection characteristics regardless of their output power level in order to prevent degradation of the input reflection level.
However, changing the collector voltage Vc and the idle current Icq of an amplifier transistor, as in the power amplifier disclosed in the above patent publication, results in a change in the S-parameters of the transistor and a corresponding change in the phase shift and the input reflection in the transistor.